1. Field of the Invention
The present invention relates generally to a current detection method utilizing pulse width modulation. Specifically, the invention relates to a current control method for digital current control applications using a PWM (Pulse Width Modulation) inverter, particularly when a high carrier frequency is utilized.
2. Description of the Prior Art
In such devices as variable speed motor driving arrangements, non-stop electrical sources and the like, PWM inverters are often employed for improving wave recognition. Further, when an IGBT (insulated-gate bipolar transistor), FET-MOS, high speed switching terminal or the like is employed in a main circuit of such a PWM inverter, an even higher level of improvement can be realized.
In a PWM inverter, control of voltage and vector control are mutually dependent. For example, referring to FIG. 4, a block diagram of a PWM inverter for current control is shown. As may be seen, a vector control portion 1 requires a speed current demand, a torque current demand as well as a control frequency and outputs a magnetic induction current demand ild and a perpendicular torque demand ilq to an ACR portion 2. The ACR (digital current control) portion 2 receives both the magnetic induction current demand ild and the torque current demand ilq and a detected current variation and performs proportional integral (PI) current control. Then, the ACR converts the 2 phase input to a 3 phase output in the form of voltage demands Vu, Vv, Vw (and a coordinate signal) to a PWM (pulse wave modulation) pattern generator 3. At the PWM pattern generator, from the voltage demands for each phase, the carrier frequency and pattern data from the pattern generator 3, PWM patterns for each phase-are generated and output to a main circuit 4 from which a voltage and phase of the output are determined and supplied to an induction motor 5.
A speed detector 6 associated with the induction motor 5 outputs an angular speed signal .omega.r to an adder 7. Based on the angular speed signal .omega.r and the control frequency .omega.s the adder 7 outputs a electrical source angular speed signal .omega.o to the ACR portion 2. Further, a current detecting hall element 8, or the like is interposed between the main circuit 4 and the induction motor 5 and provides a sample of the detected current value for each phase via a sample and hold circuit 9.
The current values-for each phase sampled by the sample and hold circuit 9 are converted to a digital value at an A/D (analog/digital) converter 10 and the digital values are supplied to the ACR portion 2 where the three phase input coordinates are converted to two phase coordinates for carrying out digital current control.
However, according to such an arrangement, when the PWM current is affected by a `ripple` component at the sampling timing of the sample and hold circuit, the true current output of the inverter cannot be reliably detected since ripple noise present at the sampling timing becomes superimposed over subsequent samplings.
For overcoming this drawback, the present applicant has previously proposed (i.e. in Japanese Patent Application First Publication 8-215182), that when a current sampling timing coincides with output of the PWM pattern, suitable control of the sampling timing may be implemented such that it is possible to detect the average value of one PWM cycle period and an equivalent detected current value in one sampling operation.
By the above-described current detection method, influence of variation of a ripple component on PWM may be eliminated and current may be certainly detected and, since use of a low pass filter or the like is not necessary, a response time for detection may be considerably improved.
However, in such conventional current detecting methods, an inverter main circuit utilizes an IGBT high-speed switching element which, when a PWM waveform generating portion utilizes a substantially high frequency carrier, a size of the IGBT switching element must be substantially large (i.e. 1-3 .mu.sec in width). In addition, a high carrier frequency accompanies a high switching frequency which causes ripple noise to accumulate because of voltage switching at the sampling point, as will be explained below with reference to FIG. 5.
Referring to the drawing, a typical three phase voltage pattern and U phase current waveform are represented. In each PWM sampling period Tc the same waveform is repeatedly sampled. Thus, in each sampling period a symmetrical voltage waveform is present and one cycle of the carrier frequency is restricted to 1/2 the smallest unit of the PWM waveform.
Inside of the current waveform, the PWM cycle period Tc corresponds to a U-phase component Iu of the current waveform, and at a punctuation point (indicated by arrows) indicating the smallest unit of the PMW waveform, or 1/2 of a current ripple of .DELTA.I, sampling may be accomplished which gives an average value of the current ripple.
In the above described same period current sampling, detection signals are produced for each phase of current (i.e. waveforms Iu, Iv, and Iw), though FIG. 5 shows only the waveform Iu. The voltage switching timing for each phase causes superimposed current ripple noise to accumulate. When the arrow indicated current sampling points differ from the basic PWM cycle period Tc, this ripple noise does not appear in the detection period, at high carrier frequencies, and the sampling points and the noise generation points become undesirably close together. Thus, delay of IGBT switching (which is inherently from several .mu.sec to several tens of .mu.sec) is incurred since the amplitudes of sampling points approach the inherent switching speed of the IGBT. This tendency, becomes marked when the PWM voltage demand becomes high, that is when the voltage control factor approaches 1. Therefore, it has been required to provide a noise filter during current detection without delay of response time of operation.